Transmission line losses—driven by skin effect and dielectric properties—play a critical role in degrading high-speed signal integrity and eye performance.
Transmission line loss directly affects eye diagram quality, with around −12 dB at Nyquist marking the limit before signal integrity rapidly degrades without equalization.
Continuous Time Linear Equalization (CTLE) enhances high-speed serial signals by compensating for channel loss, improving eye openings while balancing noise performance.
We've been looking at the broad topic of debugging high-speed serial links, and in that context, we're also touching on ways to improve signal performance on the receiver side. One of those ways is to implement continuous time linear equalization (CTLE).
We know that a serial-data channel will attenuate the signal, and that it will attenuate higher frequencies more than lower frequencies. CTLE endeavors to boost the higher frequencies at the receiver to bring all frequency components of the signal to a similar amplitude, which in turn boosts jitter and eye-diagram performance. We're looking to equalize the combined characteristics of the transmitter and channel, thereby removing inter-symbol interference (ISI) at the received signal sampling points.
A CTLE implementation is operating on an analog input signal after it's been sampled by a sample- and-hold circuit. We call it "linear" because there are no non-linear components. It's typically modeled as a two-pole (one zero) finite impulse response (FIR) filter.
Different DC gain values are chosen for the filter poles depending on the channel loss characteristics. If it happens to be a low-loss channel of short physical length, that gain value will approach 0 dB, meaning that there's not a lot of equalization happening. But because we're trying to create an inverse of the channel, there still needs to be some CTLE. Having said that, we don't want to over-equalize by boosting high frequencies more than necessary, because that will degrade noise performance.
Figure 1: A CTLE implementation at the receiver end of a serial-data channel seeks to boost higher frequencies while not boosting noise any more than necessary
The zero and first pole in the equalizer should ideally be placed as close as possible for good CTLE performance. The first zero provides the high-frequency boost that opens the eye diagram. The first pole avoids peaking at the center of the eye, while the second pole limits the bandwidth. You want to avoid equalizing the entire band with the noise frequencies. Over-equalizing will also risk creating a non-linear phase response. Figure 1 shows the amplitude response only. Given that the equalizer is a linear continuous time system, we'd expect phase response to be linear. If it's not, chances are that too much CTLE is being applied.
Figure 2: With 2 dB of CTLE, there's a small amount of improvement in the eye
A couple of screen grabs with varying amounts of CTLE applied to a data stream can illustrate the effects. Without any CTLE, the signal's noise performance is decent but the eye itself is sub optimal. Figure 2 shows the effects of 2 dB of CTLE. As you go higher in boost, the eye opens further and further, as can be seen in Figure 3 where 4 dB of CTLE is in effect.
Figure 3: Applying 4 dB of CTLE opens the eye further but also shows a commensurate rise in noise
However, with more boosting of the higher frequencies comes degradation of noise performance. The purple fuzz surrounding the eye diagram becomes more and more prominent, as can clearly be seen in Figure 4 with 7 dB of CTLE. In most cases, receive-side CTLE implementations are adaptive, with link-training sequences exchanged between transmitter and receiver to arrive at an optimal CTLE setting.
Figure 4: With 7 dB of CTLE, overall signal amplitude is notably higher, but so is the noise component
Eric Bogatin has presented a number of webinars on optimizing serial data link performance. You can find these webinars listed on page linked to the button below.
Eric is a professor in the EE department at Colorado University, Boulder and a Fellow at Teledyne LeCroy. He has a BS in Physics from MIT and a PhD in Physics from the University of Arizona, Tucson. He enjoys DesignCon and writing for SI Journal.
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